计算机与信息学院

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教师材料

教师信息 个人照片
姓    名 李建华 性    别   男
出生年月 1985.08 最终学位 博士
毕业学校 中国科学技术大学
从事专业 教育科研 职    务
所属院系 计算机系
所属科室(研究所) 情感计算与系统结构所 职     称 副研究员
联系方式
办公电话 0551-62901537
E-mail jhli AT hfut.edu.cn
通讯地址 合肥工业大学计算机与信息学院
邮  编 230009
简    历
  李建华,男,博士。

2007年于安庆师范学院获取计算机科学与技术专业学士学位;
2013年获得中国科学技术大学软件与理论专业博士学位,同时获得香港城市大学(与中国科学技术大学联合培养)电脑科学博士学位。

2010年1月至2011年7月以及2012年2月至2012年8月在香港城市大学计算机系担任研究助理(Research Assistant);
2013年8月起在合肥工业大学计算机与信息学院从事教学与科研工作;
2016年1月起在香江学者计划的支持下于香港城市大学访学;
研究方向
  片上网络(on-chip networks)、新型非易失性存储器(emerging non-volatile memory, such as STT-RAM, PCM, etc.)、嵌入式系统(embedded systems)等。

欢迎对计算机系统感兴趣的同学报考!

要求:
(1) 有较好的编程能力(C/CPP、Python);
(2) 掌握微处理器结构并了解操作系统基本原理;


科研项目:
2015年度"香江学者"计划,2016/01-2018/01,主持(PI).
国家自然科学青年科学基金,批准号:61402145,2015-2018,主持(PI).
安徽省自然科学青年基金,批准号:1508085QF138,2015-2017,主持(PI).

Reviewer for:
ACM Transactions on Embedded Computing Systems (TECS);
IEEE Transaction on Parallel and Distributed Systems (TPDS);
IEEE Transaction on Very Large Scale Integration Systems (TVLSI);
IEEE Transactions on Computers (TC);


教学工作
  本科生:《计算机系统结构》
获奖情况
  Hong Kong Scholar Award, 2015.
主要论著
  1. Jianhua Li, Minming Li, et al., "Thread Criticality Assisted Replication and Migration for Chip Multiprocessor Caches", in IEEE Transactions on Computers (IEEE TC 2017, SCI, CCF A类).

2. Jianhua Li, Xin An, Yiming Ouyang and Wei Wang, "Thread Progress Aware Block Migration for Dynamic NUCA", in 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2016).

3. Jianhua Li, Liang Shi, Qingan Li, Chun Jason Xue, Yiran Chen, Yinlong Xu and Wei Wang, "Low-Energy Volatile STT-RAM Cache Design Using Cache Coherence Enabled Adaptive Refresh", in ACM Transactions on Design Automation of Electronic Systems (ACM TODAES 2013, SCI, CCF B类).

4. Jianhua Li, Liang Shi, Chun Jason Xue, and Yinlong Xu, "Dual Partitioning Multicasting for High-Performance On-Chip Networks", in Journal of Parallel and Distributed Computing. (JPDC 2014, SCI, CCF B类).

5. Jianhua Li, Liang Shi, Qingan Li, Chun Jason Xue, and Yinlong Xu, "Thread Progress Aware Coherence Adaption for Hybrid Cache Coherence Protocols", in IEEE Transactions on Parallel and Distributed Systems. (IEEE TPDS 2014, SCI, CCF A类).

6. Jianhua Li, Liang Shi, Qingan Li, Chun Jason Xue and Yinlong Xu, "CCear: Cache Coherence Enabled Adaptive Refresh for Volatile STT-RAM", in Design, Automation, and Test in Europe (DATE '13, CCF B类).

7. Jianhua Li, Liang Shi, Qingan Li, Chun Jason Xue and Yinlong Xu, "TEACA: Thread ProgrEss Aware Coherence Adaption for Hybrid Coherence Protocols", in the 10th IEEE/ACM Symposium on Embedded System for Real-Time Multimedia.

8. Jianhua Li, Chun Jason Xue, and Yinlong Xu, "STT-RAM Based Energy-Efficiency Hybrid Cache for CMPs", in the 19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC '11).

9. Jianhua Li, Liang Shi, Chun Jason Xue, Chengmo Yang, and Yinlong Xu, "Exploiting Set-Level Write Non-Uniformity for Energy-Efficient NVM-Based Hybrid Cache", in the 9th IEEE/ACM Symposium on Embedded System for Real-Time Multimedia.

10. Jianhua Li, Chun Jason Xue, and Yinlong Xu, "LADPM: Latency-Aware Dual-Partition Multicast Routing for Mesh-Based Network-on-Chips", in the 16th IEEE International Conference on Parallel and Distributed Systems (ICPADS '10, CCF C类).


合作论文
1. Fanfan Shen, Yanxiang He, Jun Zhang, Nan Jiang, Qingan Li, Jianhua Li, "Feedback Learning based Dead Write Termination for Energy Efficient STT-RAM Caches", in Chinese Journal of Electronics, 2017 (SCI).


2. Qingan Li, Yanxiang He, Jianhua Li, Liang Shi, Yiran Chen, Chun Jason Xue, "Compiler-Assisted Refresh Minimization for Volatile STT-RAM Cache", in IEEE Transaction on Computers, (TC 2015, SCI, CCF A类).

3. Yazhi Huang, Liang Shi, Jianhua Li, Qingan Li, Chun Jason Xue, "WCET-Aware Re-Scheduling Register Allocation for Real-Time Embedded Systems With Clustered VLIW Architecture", in IEEE Transactions on VLSI Systems", (TVLSI 2014, SCI, CCF B类).

4. Qingan Li, Jianhua Li, Liang Shi, Mengying Zhao, Chun Jason Xue, Yanxiang He, "Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems", in IEEE Transactions on VLSI Systems, (TVLSI 2014, SCI, CCF B类).

5. Liang Shi, Jianhua Li, Qingan Li, Chun Jason Xue, Chengmo Yang, Xuehai Zhou, "A Unified Write Buffer Cache Management Scheme for Flash Memory", in IEEE Transactions on VLSI Systems, (TVLSI 2014, SCI, CCF B类).

6. Liang Shi, Jianhua Li, Chun Jason Xue, Xuehai Zhou, "Cooperating Virtual Memory and Write Buffer Management for Flash-Based Storage Systems", in IEEE Transactions on VLSI Systems, (TVLSI 2013, SCI, CCF B类).

7. Wanyong Tian, Yingchao Zhao, Liang Shi, Qingan Li, Jianhua Li, Chun Jason Xue, Minming Li, Enhong Chen, "Task Allocation on Nonvolatile-Memory-Based Hybrid Main Memory", in IEEE Transactions on VLSI Systems, (TVLSI 2013, SCI, CCF B类).

8. Qingan Li, Jianhua Li, Liang Shi, Chun Jason Xue, Yiran Chen, Yanxiang He, "Compiler-assisted refresh minimization for volatile STT-RAM cache", (ASP-DAC 2013, CCF C类).

9. Liang Shi, Jianhua Li, Chun Jason Xue, Xuehai Zhou, "Hybrid nonvolatile disk cache for energy-efficient and high-performance systems", in ACM Transactions on Design Automation of Electronic Systems, (TODAES 2012, SCI, CCF B类).

10. Qingan Li, Jianhua Li, Liang Shi, Chun Jason Xue, Yanxiang He, "MAC: migration-aware compilation for STT-RAM based hybrid cache in embedded systems", (ISLPED 2012, CCF C类).

11. Qingan Li, Liang Shi, Jianhua Li, Chun Jason Xue, Yanxiang He, "Code Motion for Migration Minimization in STT-RAM Based Hybrid Cache", (ISVLSI 2012).

12. Liang Shi, Jianhua Li, Chun Jason Xue, Chengmo Yang, Xuehai Zhou, "ExLRU: a unified write buffer cache management for flash memory", (EMSOFT 2011).



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